SI/PI Sponsored By International Manufacturing Services (IMS) Workshop

Assessment of Thick & Thin Film Passive Monolithic SMT Resistor Elements in Handling Low Duty Cycle (LDC) Signal Conditions


Eastern Time October 5, 2022 4:00 pm - 4:30 pm

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Wes Laquerre

A study of risks and factors designers must consider when selecting a resistor component which will be exposed to low duty cycle pulse (LDC) power. Mechanisms and techniques to compare or predict durability of a given selection of thick and thin film components against a projected LDC form is also discussed.

In the past 10 years, requests for passive resistor elements have revealed a growing trend in application specific signal requirements. These requirements include: moderate to high power, LDC pulses with fast rise/fall times, pulse widths under 1uS, low average power, and pulse repetition frequencies (PRF) ranging from 1 Khz to 40 Khz. Applications generally associated with these types of signals include Vertical Cavity Surface Emitting Laser (VCSEL) drivers used for 3D imaging and object recognition, Low Duty Cycle (LDC) algorithms used for interference mitigation in the presence of Wideband Orthogonal Frequency Division Multiplexing (ODFM) systems, general “search and sense” applications, and more.

LDC signals and applications represent a departure from the more traditional usage of the word “pulse” which was generally accredited to signal transitions related to system power up, capacitor discharges, or the hybrid mode operation of a periodic CW signal burst that would remain on for seconds or minutes. This paper will offer insight regarding the effect LDC signals found in emerging technology have on the selection of passive monolithic SMT resistor elements.