Fear, Uncertainty and Doubt – An Irreverent View of 224 Gbps Channel Data Rates

The road to 224 Gbps channel data rates is filled with twists, turns and fender-rattling potholes. Design challenges including modulation schemes, IC packaging, breakout regions, PCB stack-up, laminate selection, mechanical concerns, thermal mitigation and more are obstacles that must be overcome. In this keynote, Samtec will review the roadblocks of 224 Gbps performance while presenting […]

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Ground Stitching and Copper Balancing for High Performance SI Evaluation Kits

High-performance I/O interfaces offer small design margin for physical channel impairments such as routing impedance discontinuities and crosstalk. Mitigation techniques commonly deployed in single-purpose test/evaluation boards include thieving pads (copper balance and etch control) and stitching vias (crosstalk reduction and optimal return path). For critical high-speed nets, best practices combine these as “stitched thieving” in […]

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