Program/Schedule

EDI CON Online 2023 Schedule

 
Signal Integrity/Power Integrity Sessions

5G/W-Fi/IoT Sessions

PCB/Interconnect/EMC-EMI Sessions

Radar/Automotive/SATCOM Sessions
 

Signal Integrity/Power Integrity – October 4, 2023


10:00 a.m. – 10:30 a.m. Eastern Time

KEYNOTE: GaN Adoption: Breaking Down the Barriers to Widespread Acceptance

Alex Lidow, Ph.D.

After more than 13 years of mass production, GaN-on-Si has gained widespread acceptance as the successor to the aging silicon MOSFET for voltage ranging between 40 V and 650 V. What, therefore, are the variables controlling the rate of growth of GaN power devices. We will dig into the experience, and lessons learned from the power MOSFET as well as the recent experiences with GaN in applications ranging from DC-DC conversion to motor drives and lidar in markets such as space, automotive, enterprise computing, and consumer products.

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10:30 a.m. – 11:00 a.m. Eastern Time

FEATURED TALK: 3 Design Tips for Power Distribution Networks

Istvan Novak

If power distribution does not work properly, signal integrity and system functionality may become totally irrelevant— because the system will not work. Unfortunately for power integrity designs and validation, there are no industry standards, and often even the specifications and requirements are awfully incomplete. During the power distribution design process, many of the requirements are left to the designer to establish, what makes the design and validation processes a little bit ill-defined and very challenging. Join us in this EDICON discussion that covers design tips for power distribution networks, including considerations of capacitance loss in MLCCs due to DC and AC bias, the need for validated power-converter models, and how to avoid cable-braid loop error in PDN measurements.

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11:00 a.m. – 11:30 a.m. Eastern Time

Migrating to 48V Power Distribution Comes with Measurement Challenges

Steven M. Sandler

Power distribution systems are moving to 48V. This is true for data center, AI, supercomputer, and more recently, electric vehicle technologies. There are good reasons for this – the operating current is lower, making it easier to manage; resistive losses are reduced, improving operating efficiency; semiconductor utilization is better, again improving efficiency while reducing cost. These benefits are needed to support the increasing power demands within these applications.

This migration also presents measurement challenges. In this session I’ll discuss measuring impedance, ripple, and step load response at 48V. I’ll also share some solutions and tips for getting good data and keeping your instruments alive.

Join us in a journey from the earliest days of signal integrity engineering and rocket through to the issues facing today’s engineers and the possible solutions on the horizon. This presentation includes its own merry band of SI aficionados. This trip through time is led by our intrepid host, Eric Bogatin, who was part of that initial band, and still carries the torch as a professor at UC Denver and technical editor of SIJ. He is joined by: Donald Telian, Todd Westerhoff, Scott McMorrow, and Larry Smith, who share their insights.

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11:30 a.m. – 12:00 p.m. Eastern Time

Jitter Splitter – Most Detailed Jitter Decomposition Made Easy

Guido Schulze

A key aspect in the development of high-speed interface applications is the signal integrity verification. It assures the right quality for the data transmission and qualifies the margins of the design. Jitter and noise are some of the most relevant signal integrity specifications for high-speed transmitters. However, in a complex design, also external sources such as neighboring wireless interfaces, processing or power components can interfere the data transmission. The novel signal-model-based jitter decomposition algorithm from Rohde & Schwarz precisely separates jitter and noise components, giving developers deep insights for the root cause analysis of signal integrity issues. Join us to learn more on how to set this up and gain insights to your designs quicker.

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12:30 p.m. – 1:00 p.m. Eastern Time

EMC and Signal Integrity Test Boards

Joseph C. (Jay) Diepenbrock

There have been many papers presented on the need for adequate decoupling to support high speed serial channels. However, there are not many papers dealing with the electrical effects of the types of capacitors used and the topologies used to attach the capacitors to the printed circuit boards and ICs they support. This presentation will describe a set of printed circuit boards that is designed to show the effects of these choices and allow designers to make informed choices. They also provide for measurement of wire inductance, effects of Ground plane splits and crosstalk. Measurements will be done during the presentation to illustrate the effects of those choices and trade-offs.

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1:00 p.m. – 1:30 p.m. Eastern Time

Accelerate Time to PCB Power Integrity Signoff with a Shift-Left Approach to Simulation

Pedro El Awar

PCB designers need to ensure sufficient power is being delivered to the board’s components. Design teams have traditionally had to wait until the PCB is fully routed before power integrity (PI) can be analyzed, leading to multiple design revisions and schedule delays. A growing trend that addresses power delivery challenges earlier in the design cycle has successfully cut the number of design respins and reduced schedule delays. This presentation will share a design methodology where EEs and PCB designers who traditionally lack PI expertise can address power delivery challenges themselves without ever leaving the PCB design canvas.

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1:30 p.m. – 2:00 p.m. Eastern Time

What is enough? VDDQ Package Power Integrity Analysis with DDR4 PHY

Benjamin Dannan

As voltage margins for power rails continue to decrease, end-to-end power integrity modeling is already difficult without having to be concerned if all the models, that are part of your simulation, are correct. As system designers, we typically expect and, in most cases, assume that all the models from vendors are correct.

So, what does an engineer do if one of the models needed for a power integrity simulation is not correct? What if this is a die model? How does an engineer verify if the die model is accurate or has enough on-die capacitance to manage the high-frequency currents.

This presentation will demonstrate how to build and model an end-to-end power Integrity model for a DDR4 PHY and package. As part of this discussion, analysis will be shown to determine if the DDR PHY integrated into a custom ASIC has sufficient on-die capacitance for the respective DDR4 power domain.

At the end of this presentation engineers will understand how to model and develop an end-to-end power Integrity model for their ASIC while determining if their ASIC has sufficient on-die capacitance for their application.

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2:00 p.m. – 2:30 p.m. Eastern Time

Dielectric Anisotropy Implications for PCB Transmission Lines and Via Modeling

Bert Simonovich

When modeling transmission lines and vias, it’s vital to obtain dielectric material properties from trustworthy sources. One critical consideration is the relative permittivity (εr) or dielectric constant (Dk). If incorrect values are used, it could result in impedance miscalculations, which could impact performance margin and yield when the PCB is finally fabricated. Because fiberglass reinforced laminates used in PCB construction are anisotropic, the effective Dk is different, depending on the signal propagation direction with respect to the X, Y or Z axis. In this presentation, material anisotropy will be discussed as it relates to PCB transmission lines and via performance as well as implications when the wrong value is used in the model.

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2:30 p.m. – 3:00 p.m. Eastern Time

PCB Design and Simulation Challenges in 224G Interconnects with Altium + Ansys

Zachariah M Peterson

The fastest data rates being implemented in data center architecture is 224G PAM-4, which supports a variety of interconnect types between servers, routers, and other infrastructure. At the board and chip level, the PCB and package exhibit certain design challenges that can degrade signal integrity in 224G PAM-4 channels. To overcome these challenges, greater collaboration between PCB design applications and simulation applications is needed. In this presentation, we outline some of the design challenges present in boards and packages supporting 224G PAM-4 channels. We will explore signal integrity issues (crosstalk, losses, resonances) in boards and packages interfacing with 224G PAM-4 channels in simulation, and we qualify certain design guidelines using a new integrated design and simulation solution linking Altium and Ansys. Attendees will have a chance to see the typical design approaches that are being proposed and implemented in 224G PAM-4 channels.

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5G/W-Fi/IoT – October 11, 2023


10:00 a.m. – 10:30 a.m. Eastern Time

KEYNOTE: The Future is Bright for 5G: A Look at Trends in Mobile Communications

Chris Pearson

Where we are with 5G
• Current Connections
• Forecast Connections
• Deployments

Promises of 5G
• Standards and Spectrum
• Network density

What’s beyond?
• Standards and Commercial Timeline
• Key Enablers

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10:30 a.m. – 11:00 a.m. Eastern Time

FEATURED TALK: 5G Private Networks – Coverage and Channel Simulation in Smart Factories

Dr. Marc Rütschlin

Virtual twins of modern factories will improve their design, operating efficiency and sustainability. 5G private networks will form the nervous systems of these twins, providing communication and localization for people, machines, automated vehicles and sensor networks. 5G networks will be able to deliver the required networking performance, and initial industrial deployments are already showing promise.

But modern industrial environments are complex. Network planning has to combine an understanding of both coverage and channel responses, that is the communication links between individual transmitters and receivers. Simulation has an important role to play in predicting these performance indicators, complementing measurement campaigns which can be costly and time-consuming, disruptive to factory operation, and can themselves be disrupted by external factors like pandemic responses. In planned, so-called green-field facilities, communication networks can be designed virtually before construction even begins.

The virtual twin model of the factory wireless network can help to minimize the number of access points whilst optimizing coverage before the factory is modified or built. This presentation will describe multiple phases of a flexible ray tracing-based workflow – from model preparation to antenna positioning – for analysing coverage and communication channels in these complex and dynamic environments, using SIMULIA CST Studio Suite and the Dassault Systèmes 3DEXPERIENCE platform.

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11:00 a.m. – 11:30 a.m. Eastern Time

The 5G ride is winding down…what is next?

Joe Madden

The peak of 5G deployment has passed, and the outlook for mobile infrastructure and the RF content in handsets looks pretty negative for the next few years. However, some new 5.5G or 6G frequencies are coming into play and new Private 5G opportunities are lining up for growth in new directions.

This presentation will outline the opportunities that are coming in the short term with Private 5G and in the longer term with 6G, to illustrate how the RF components need to adapt.

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11:30 a.m. – 12:00 p.m. Eastern Time

Thinner, Lighter Radios for 5G and Beyond

Gavin Smith and Wim Rouwet

As the mobile market is full steam ahead with 5G deployments, carriers and operators look for opportunities to differentiate. With the global increase in data consumption, the need for further deployments and ways to fill the gaps in dense areas is becoming more visible. To bridge the gaps in coverage, the need for small cells scattered throughout urban areas could increase. Working in conjunction with the 32T32R and 64T64R mMIMO active antenna systems, compact 4T4R small cells can enable consumers uncompromised coverage. Like mMIMO radios, smalls cells also focus on size, weight and power (SWaP) requirements as they can be affixed on various infrastructure, like a light pole where they are virtually incognito. To fit in these tight form factors, NXP looks at ways to leverage their digital components along with new RF packaging techniques to provide a thinner, lighter radio subsystem.

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12:30 p.m. – 1:00 p.m. Eastern Time

Automated Gain/Phase Control Measurement and Calibration for Sub-6GHz 5G

Richard Cavanagh

Massive MIMO antenna architectures are commonly used in sub-6 GHz 5G networks due to their channel capacity benefits. These antennas enable beamforming and beam steering, which can be performed using different approaches. Analogue and hybrid approaches use multiple attenuators and phase shifters to adjust the signals transmitted by each radiating element, and measurement and characterisation of these gain/phase modules is necessary to optimise performance.

This presentation outlines an automated test setup used to measure an n78 band (3.3 to 3.8 GHz) 12-bit vector modulator formed of a 6-bit attenuator and 6-bit phase shifter (both commercial off the shelf (COTS) components). A Python program was written to automate the testing of all 4096 possible states, to better understand the potential performance of the module. The performance is presented in the n78 band and across a wider 2-7 GHz range. The technical considerations for performing and processing the measurements are outlined and the advantages of an automated test setup are highlighted.

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1:00 p.m. – 1:30 p.m. Eastern Time

Measurement of PAPR as a Fast and Cost-Effective Indicator of EVM and BER Degradation

Bob Buxton

Orthogonal frequency division multiplexing (OFDM) is the dominant methodology used in communications systems today ranging from Wi-Fi to cellular applications. OFDM has many benefits, but also inherently causes the transmitted signal to have a high peak to average power ratio (PAPR). High PAPR levels can be overcome by increasing output back-off (OBO) in the transmitter’s power amplifier (PA); however, that means the PA is operating less efficiently. Measuring PAPR reduction of the signal as the power at the output of the PA increases is a fast and effective alternative to monitoring error vector magnitude (EVM) or bit error rate (BER) degradation.

This presentation will illustrate the relationship between PAPR, EVM and BER. It will conclude with a description of a practical PAPR and complementary cumulative distribution function (CCDF) measurement solution using peak power sensors that may be used as a fast and economical proxy to assess how a PA will impact system performance.

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1:30 p.m. – 2:o0 p.m. Eastern Time

Wi-Fi Sensing – The Next Big Evolution of Wi-Fi

Chris Beg

What powers the incredible capabilities of Wi-Fi Sensing? Discover how Cognitive’s WiFi Motion utilizes the abundance of Wi-Fi energy to power applications in home monitoring, eldercare, home automation, and beyond.

Presentation to cover:
• What is Wi-Fi Sensing?
• Sounding rates, spectrums & the standards
• Applications of Wi-Fi Sensing

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PCB/Interconnect/EMC-EMI – October 18, 2023


10:00 a.m. – 10:30 a.m. Eastern Time

KEYNOTE: What They Don’t Teach You in School: My Top Twenty Rules for All Engineers

Eric Bogatin

Electrical Engineering is more than a bunch of formulas and circuits and oscilloscopes. It is about processes, risk management, tradeoff analysis, systems engineering and engineering judgement. You enhance your engineering judgement using measurement and analysis tools and by learning from your mistakes. I often say an expert is someone who has made all the mistakes possible. I will offer you twenty rules I have developed over the years which will enhance your engineering judgement so you do not have to make all the mistakes I did.

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10:30 a.m. – 11:00 a.m. Eastern Time

FEATURED TALK: PCB Verification for Reliable and Safe Automotive Electronics

Marek Jableka and Niranjan Bhat

PCB verification identifies and suggests corrections early in the design stage. Through verification, users check a pre-prototype layout design against geometrical design requirements and best practices. As an outcome, the risk for product functional, electrical, and assembly issues is reduced.

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11:00 a.m. – 11:30 a.m. Eastern Time

The Ringing Rocket

Michael Violette

During my mid-career I got a gig at a NASA affiliate in the bucolic hamlet of Beltsville, MD (quaintly named after the DC “Belt”way) in suburban Maryland. The Conestoga Rocket was a pre-SPACEX effort to commercialize spaceflight. The tale includes a cameo appearance by Arnold Schwarzenegger and a team of contract engineers working to put a payload into low Earth Orbit. A few years after the engagement had ended, I got a call from my former cubicle mate. “Hi Mike, it’s Bill J.” “Hey! What’s new?” You didn’t hear? The Conestoga splashed…”Ohhh, was it EMI….?”

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11:30 a.m. – 12:00 p.m. Eastern Time

Fundamentals of Radiated Susceptibility Focusing on Requirements, Equipment, and Application

Dean Landers

This will be a technical discussion regarding EMC testing, specifically Radiated Susceptibility. We will discuss the equipment needed, power ratings, frequency ranges, test requirements, and actually performing the test. We will also discuss the different methods of performing the test, such as the differences between military (MIL-STD-461), commercial aviation (RTCA/DO-160), and commercial product (IEC 61000-4-3) testing.

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12:30 p.m. – 1:00 p.m. Eastern Time

The Current State of Chip Supply and Demand

Frank Cavallaro

Recent geopolitical forces and legislation compounded with today’s rapid advancement of technology are poised to significantly impact semiconductor supplyand demand in sectors like defense, consumer, automotive and computing. Industryexperts are warning there will be significant impacts to semiconductor production long-term as a result of the CHIPS Acts in the U.S., E.U. and U.K. In this presentation, Frank Cavallaro, CEO of A2 Global, will elaborate on the below key concepts:
• Complexities and nuances of the global chip supply chain
• Predictions for chip capacity over the next 3-5 years with heightened global competition
• How and why various industries source their components differently
• Potential component constraints amid increased demand for electrification of vehicles
• How OEMs can be well equipped for periods of unforecasted demand

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1:00 p.m. – 1:30 p.m. Eastern Time

Understanding Millimeter-Wave Performance Variations Caused by Dynamic Thermal Environments

John Coonrod

Many of the new millimeter-wave (mmWave) applications as well as applications from the past several years, operate in an environment where the temperature changes significantly. The changing operating temperature can be related to the environment or to the circuit operation itself and more common, is the combination of these two thermal influences. PCBs use many different types of materials, different circuit construction stack-ups and different circuit processing, all of which can have an influence on the mmWave performance of a circuit due to changing temperatures.

This presentation will cover multiple topics that can impact mmWave performance due to temperature change over short periods of time and longer periods of time. The TCDk (Thermal Coefficient of Dielectric Constant) will be explained as well as TCIL (Thermal Coefficient of Insertion Loss). These two properties can have a significant influence on the mmWave performance of a PCB. However, there are several other properties that influence mmWave consistency and moisture absorption is certainly one of them. Additionally, long term thermal exposures can impact mmWave performance as well as changes that may occur with the properties of final plated finishes. These different concepts will be explained in this presentation, with accompanying supporting data.

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1:30 p.m. – 2:00 p.m. Eastern Time

Simulating High Speed PCB channels Including Interconnects for 112G and Beyond

Gary Lytle

PCB designers are facing escalating challenges for completing product designs due to ever-increasing speeds and more stringent specifications. This can lead to multiple design revisions and schedule delays, ultimately impacting companies’ revenue. Traditionally engineering teams create submodels and stitch together S-parameters to verify that channels are spec compliant, which can cause 3-D interactive phenomena such as crosstalk to be discovered late in design cycles. This presentation will demonstrate how complete channels can be analyzed, including vendor-supplied encrypted interconnects, ensuring specifications are maintained from design to manufacturing.

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2:00 p.m. – 2:30 p.m. Eastern Time

Breakout Region Design Changes Everything

Kiana Montes

It’s more than just selecting the best interconnect. The breakout region (BOR), which consists of a short section of trace and signal vias that connect to the tip of the connector, must be modeled and optimized together. Join us in this EDI CON ONLINE talk where you can see the disappointing results of an unoptimized BOR design, the excellent performance of an optimized BOR design, and the results of a creative design that enables power, analog, and digital signals to all transverse a single connector that was originally designed for digital signals.

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2:30 p.m. – 3:00 p.m. Eastern Time

Automated Compliance Testing of PCIe 5.0, 6.0 Cable and Connector with R&S Vector Network Analyzers

Lilia Smaoui

High-speed digital interfaces are at the core of all electronic designs. Increasing data rates and growing integration density create new challenges for designs and manufacturing. Signal integrity is a key requirement, which needs to be ensured.

Testing high speed cables for data centers or consumer electronics is a highly complex task that requires precision, support for higher frequencies and a multiport setup. Conventional manual testing with a 4-port vector network analyzer is a time-consuming task and can be prone to human error.

Rohde & Schwarz has introduced a fully automated compliance test solution, which allows easy, precise and time-saving standards-compliance testing for PCIe 5.0 & 6.0 cable and connector. The solution combines the precision and high performance of Rohde & Schwarz vector network analyzers with the flexible R&S®OSP open switch and control platform and the R&S®ZNrun software suite to make measurement faster, easier, and more reliable.

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3:00 p.m. – 3:30 p.m. Eastern Time

Changing Times

Tara Dunn

The Electronics Manufacturing industry is changing at a rapid pace. Technology is evolving, the skilled worker shortage is become more apparent as we navigate through new technologies, new processes and new ways to look at electronics manufacturing. This session will review key trends for PCB design, PCB fabrication and SMT while highlighting trends in work force development efforts across all segments.

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3:30 p.m. – 4:00 p.m. Eastern Time

Board-to-Board Connector Market Trends for SG NR/5.SG NR Advanced Base Station Systems

Earl Lum

The advent of SG created significant increase in demand for RF coaxial board to board connectors due to massive MIMO radio units. While traditional 2T2R, 4T4R, and 8T8R radio units (RU) required RF coaxial board to board connectors, the increase in radio channels to 32 and 64 TRx radio systems has driven requirements of RF board to board connectors including power handling, height profile reduction, and obviously, costs. Additionally, high speed/power mezzanine connectors are also used within massive MIMO radio units, depending on the system level architecture and level of functional integration.

For the baseband unit (BBU) or distributed unit (DU), edge mounted high speed backplane and power backplane board to board connectors are used in multi-slot BBU/DU chassis by various RAN equipment suppliers. The emergence of Open RAN (ORAN) and virtual RAN (vRAN) solutions for the DU using bare metal servers and additional L1 acceleration cards will drive demand for traditional compute type board to board connectors such as PCle and dual in-line memory module (DIMM) sockets.

This discussion will focus on current and future requirements of board to board connectors for the RU, massive MIMO RU, and DU for SG NR and 5.SG NR Advanced applications.

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Radar/Automotive/SATCOM – October 25, 2023


10:00 a.m. – 10:30 a.m. Eastern Time

KEYNOTE: TechInsights Automotive Semiconductor Market Outlook – Trends, Challenges, and Opportunities

Asif Anwar

Semiconductor demand from smartphones, data centers, and consumer electronics has been floundering, but demand for semiconductors from the automotive sector is bucking the trend. TechInsights Automotive Semiconductor Demand Outlook 2021 to 2030 forecasts that the global automotive semiconductor market will almost triple by 2030. But this is not being driven by a tripling in the number of vehicles being produced. Instead, it is the semiconductor content per vehicle that is increasing over this timeframe underpinned by the continued momentum towards electrification. Electrification in turn is core to industry moves towards domain-based and zonal E/E architectures that will enable vehicle capabilities across ADAS and automated driving, advanced infotainment, telematics, and vehicle connectivity.

While the remnants of the COVID pandemic, the ongoing war in Ukraine, subsequent fears over the global economy, as well as ongoing attempts to fully resolve semiconductor supply issues will continue to factor into the automotive semiconductor outlook, the automotive semiconductor and associated semiconductor-based sensor demand is forecast to grow over the 5-year 2022 to 2027 period with a CAAGR (compound annual average growth rate) of 16.0%. Excluding semiconductor-based sensors, the CAAGR for automotive semiconductor dollar demand is expected to be even higher at 16.8%.

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10:30 a.m. – 11:00 a.m. Eastern Time

FEATURED TALK: Efficient Radar and SatCom Modeling Using Finite Element and Boundary Element Methods

Dr. Yuanshen Li

In this workshop, we will explore how the finite element method (FEM), boundary element method (BEM), and hybrid FEM–BEM can be used for the modeling of radar and SatCom systems. Simulating device designs prior to fabrication can save precious time and resources. We will demonstrate how to model microwave and millimeter-wave antennas and their supporting circuitry, as well as how to compute radar cross-sections (RCS). In addition, we will cover how different surface roughness models impact performance and present an efficient workflow for modeling large, high-gain antennas using a 2D axisymmetric formulation. The session will conclude with an overview of the benefits of multiphysics couplings, with mention of electromagnetic heating, mechanical deformations, and other physical effects.

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11:00 a.m. – 11:30 a.m. Eastern Time

System-level Engineering of Broadband Transmit Phased Arrays Beamforming Networks

Dr. Laila Marzall

Integrated broadband transmit phased array design challenges engineers due to the many variables involved, e.g., evaluation of performance metrics and different component tuning ranges. The antenna elements’ active impedance and the active devices’ nonlinearities will propagate through the front-end chain, affecting array performance over scanning directions, frequencies, and power levels. Nonetheless, integrated broadband transmit phased arrays present unique challenges for experimental characterization. Due to the difficulty of accessing terminals of individual components and the impossibility of adding sensors at key points of the beamforming circuits, designers must rely on simulation results for debugging/troubleshooting their prototypes. Co-simulation techniques must be considered to tackle this complex design problem, including using full-wave, harmonic balance, and system-level tools. Moreover, an initial understanding of component performance sensitivity versus resulting mismatch is key for a reliable simulation and resilient design. This talk will cover the main concepts used to evaluate the effect of nonlinearities on broadband transmit phased-array figures of merit, namely EIRP, overall efficiency, and linearity, using co-simulations as a framework. The analysis is described in the context of scanning directions, bandwidth, and power variation. Different modulation schemes are considered, and a slow power amplifier (PA) supply voltage variation is included.

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11:30 a.m. – 12:00 p.m. Eastern Time

Importance of Low Phase Noise Measurements in Satellite Communication

Daniel Monforte

Phase noise is present in all electronic signals. Satellite communications are particularly sensitive to the effects of elevated phase noise. High phase noise can cause an increased bit error rate (BER) and additional power expenditure. This presentation will cover the basics of phase noise, how phase noise affects all satellite communication, the basics of measuring phase noise, and the advantages of using a phase noise analyzer to measure phase noise.

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12:30 p.m. – 1:00 p.m. Eastern Time

Hybrid Solver in Antenna Simulation

Katerina Galitskaya

The hybrid solver is a concept of combining typical solvers for antenna simulation to significantly decrease run time and simplify the antenna optimization process. This session will cover sub-6 GHz, UWB and mm-wave radar examples.

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1:00 p.m. – 1:30 p.m. Eastern Time

Advanced Radar System Applications: Where We Are and Where We’re Headed

Erin Kocourek

We are seeing huge investments in the development, testing and fielding of land, sea, air and space-based weapons systems on the global stage. On the Homefront there is tremendous advocacy to continue strengthening our nation’s force projection posture. Advancing integrated weapon systems are critical to this posture. Advanced electronics, and in particular, radar systems are a big part of many weapon systems. The US and our allies need more “eyes” to address new threats. Erin Kocourek, Vice President, Advanced Technology and Strategy at CAES, will explore the broader landscape of missile radar systems as well as high speed weapons development. During this presentation, Kocourek will cover trends in missile systems, why radar systems are more important than ever, how radar systems are adapting in the age of hypersonics and lastly, the progress the U.S. is making in these areas.

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1:30 p.m. – 2:00 p.m. Eastern Time

Rapid Resilient Networking with Multi-Constellation Hybrid Satellite and 5G Systems

Dr. Rajeev Gopal

Efficient and assured communication is now possible with the combination of multi-orbit satellite systems and terrestrial cellular transports. With the existing GEO and new LEO broadband services from OneWeb and Starlink, and 3GPP inclusion of Non-terrestrial Transport (NTN), the satellite communications field is benefiting from disruptive innovations at rapid pace. Both technical and business focus have shifted to a hybrid environment where appropriate space (LEO/GEO) and terrestrial wireless technologies can be applied to meet diverse connectivity needs.

GEO SATCOM with affordable fixed terminals, especially with High Throughput Satellites, utilizing multiple beams for spectral reuse, have achieved high-capacity density and low cost per bit. LEO systems offer significantly lower latency that expands their use for new applications. The terrestrial wireless ecosystem with 3GPP has led the cellular industry into its fifth generation with very high data rates, low latency, and low equipment cost because of the Economies of Scale (EoS).

Smart management function at the edge (terminal) orchestrates these diverse transports to appropriately distribute traffic based on cost, availability, and QoS criteria. A centralized software function provides policy guidance by creating resource plans comprising individual coverage, service level agreements, and performance attributes which are utilized by the edge in real-time decision making.

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